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Talk on Timing Analysis in Digital Silicon Devices by Mr. Davide Sarta

April 23 @ 2:20 pm - 4:00 pm

Talk on Timing Analysis in the digital silicon devices: Challenges and techniques for timing closure in modern chips by Mr. Davide Sarta, VP of SoC Engineering, EnSilica Bristol.

Register link: Join the guestlist – University of Bristol IEEE Student Branch AND IEEE Nanotechnology UK & Ireland Chapter (Industry Talk by Ensilica) – 1.11 The Old Council Chamber, Wills Memorial Building Bristol, Tue 23 Apr 2024 2:20 PM – 4:00 PM (tickettailor.com)

Organizer

Dr. Faezeh Arab Hassani
Email:
faezeh.arabhassani@bristol.ac.uk