IEEE Electron Device Meghnad Saha Institute of Technology Student Branch Chapter

IEEE VLSI DCS 2022


IEEE VLSI DCS 2022: 3rd IEEE Conference on VLSI Device, Circuit and System

Conference Record No. : 53788

Organized by,

IEEE Electron Device MSIT Student Branch Chapter

in association with

IEEE SSCS Kolkata Chapter, IEEE Computer Society MSIT SBC, IEEE Signal Processing Society MSIT SBC and Dept. of ECE, MSIT 

Date: February 26th-27th, 2022

Venue: Meghnad Saha Institute of Technology, Kolkata, India

Focal Areas: Components, Devices, Circuits, and Systems

Special Theme: Circuits and Systems for AI/ML Computing

 

Conference URL: https://edu.ieee.org/in-msitceds/vlsidcs-2022/

Welcome to 3rd IEEE VLSI DCS 2022,  to be held in Meghnad Saha Institute of Technology (MSIT), Kolkata, India on February 26th-27th, 2022. The bi-annual VLSI-DCS conference is a premier international forum for researchers, developers, and users to present and discuss cutting-edge ideas on topics related to VLSI devices, circuits, and Systems. The conference is organized by IEEE ED MSIT Student Branch Chapter. The technical program will be tailored to reflect the wide spectrum of topics and research interests shared by researchers in the fields. We invite you to submit your original contributions, not presented or published or submitted anywhere in full or in part, or not under consideration.

** All the accepted and presented papers will be sent to the IEEE for possible inclusion in the  IEEEXplore Digital Library.

The “IEEE VLSI DCS 2022” Conference organizing committee has decided on the following two papers to be awarded as “IEEE VLSI DCS 2022 Best Paper Award” and the “Runner Up” based on the feedback received from the Session Chairs. Congratulations to both of them.

  • Best Paper Award: Chanchal for presenting the paper entitled “Dependence of Gate Leakage Current on Efficacy of Gate Field Plate in AlGaN/GaN HEMT” authored by Chanchal, Ajay Kumar Visvkarma, Amit Malik, Robert Laishram, D S Rawal and Manoj Saxena, all from the University of Delhi. 

  • Runner Up: Meghavi Rana for presenting the paper entitled “Comparative Study of Supervised Machine Learning Methods for Prediction of Heart Disease” authored by Meghavi Rana (DIT University), Mohammad Zia Ur Rehman (Indian Institute of Technology, Indore), Srishti Jain (DIT University).

Congratulations to all, and thank you to everyone who participated in IEEE VLSI DCS 2022.

Click here to view the Technical Schedule of IEEE VLSI DCS 2022

Click here to view the Total List of Accepted Papers in IEEE VLSI DCS 2022

Overall Final Statistics

Total number of Submitted Papers: 146
Total number of Accepted Papers: 63
Total number of Rejected Papers: 83
Total number of Registered Papers: 63

Topics of particular interest include, but are not limited to:

Track A: VLSI Devices

Device Modelling and Simulations, Optoelectronic Devices and Displays, MEMS, Sensors and Imagers, Power Devices, Deeply Embedded Devices and technology, Characterization, Reliability and Yield, Compound Semiconductors and High-Speed Devices, Process and Manufacturing Technology,  Memory Devices, Emerging devices,  Neuromorphic Devices, and Device Concepts, Low Power Devices and Circuits, Advanced CMOS and Beyond CMOS Devices, Photovoltaic Devices, Emerging natural and nature-inspired materials, Advanced CMOS and Beyond CMOS Devices for application in Microsystems, Logic synthesis and finite automata, Circuit and Device Interactions, Biodegradable and Flexible electronic Devices, Electron Devices for “More than Moore”, Role of Electron Devices in Transforming Surface Transportation, synthesis and verification of integrated circuits and systems of any complexity.

Track B: Nanotechnology

Novel nanomaterials and devices, Nanobiotechnology, Nanomaterials for energy conversion, Green nanotechnology, Nano Mechanics, Carbon Nanotubes emitters, Biological applications of nanoparticles, Energy applications of nanomaterials, Nano Fabrication and Metrology, Nano Heat Transfer and Energy Information Technology, Nano Sensors, Actuators and Systems Nanobionics, Nanofluidics and Bio Chips, Organic Electronics, Organic field-effect transistors (OFETs), organic electrochemical transistors (OECTs), proton transistors.

Track C: Analog/Digital/Mixed VLSI Circuits

Analog and Mixed-Signal Integrated Circuits, Amplifiers, Filters, Comparators, Oscillators, Multipliers, PLLs, RF ICs, Voltage/Current References, Sample-And-Hold Circuits, A/D and D/A Converters, High-Speed IO Interface, Energy Harvesting, Power Management,  Wireless Transceivers, and RF/mm-Wave Circuits, Low Power Circuits and systems, Circuits in Sub-threshold and Near threshold regime, Digital Integrated Circuits,  SOC, and NOC,  Linear and Non-linear Circuits,  Bio Chips; MEMS/NEMS circuitry,  Standalone memory circuits: DRAM, FLASH,  Quantum Modeling, chaos/neural/fuzzy-logic Circuits,  novel I/O circuits for advancing data rates, improving power efficiency, and supporting extended voltage applications,  clocking techniques including PLLs and CDRs components such as equalizers, high-speed ADC-RX/DAC-TX,  silicon photonic and optical interface circuitry.

Track D: VLSI Systems

Embedded system: architecture, design, and software; System architectures: NoC, 3D, multi-core, and reconfigurable; Memory System; FPGA designs, FPGA based systems; CAD: synthesis and analysis, Prototyping, verification, modeling, and simulation; imagers, displays, sensors and biomedical and healthcare applications; IoT including ultra-low power, energy harvest, wearable, sensors, display, and communication devices Big Data, Machine learning Algorithm; Wireline and Optical Communications Circuits and Systems for electrical and optical communications including serial links for intra-chip and chip-to-chip interconnections, high-speed memory and graphics interfaces, backplanes, long-haul, and power line communications; flexible, printed, large-area and organic electronics. system in package, 2.5D, 3D and monolithic 3DIC, multi-die heterogeneous integration, silicon photonic interconnects and packaging, advanced assembly and bonding, embedded cooling technologies, Efficient electrical system, Reconfigurable computing, Cluster Computation, High-Performance Distributed Computing (HPDC), parallel and/or distributed computing techniques, parallel processing, distributed computing systems, and computer networks, Power and Energy System, Signal & Image Processing Image / Video / Multimedia, Track H: Intelligent Control Systems and Optimization Data-Based Control and AI Decision Support Systems, Robotics and Automation Autonomous Agents Cognitive Approach for Robotics.

Track E: VLSI Algorithm, Design & Testing

Analog/Mixed-Signal/RF Test, ATPG & Compression, Embedded System & Board Test, Embedded Test Methods Emerging Technologies Test, FPGA Test, Silicon Debug, Automotive Test & Safety, Built-In Self-Test (BIST) Defect & Current Based Test, Defect/Fault Tolerance, Delay & Performance Test, Design for Testability (DFT) Design Verification /Validation, Fault Modeling and Simulation, Hardware Security, Low-Power IC test,  Microsystems / MEMS /Sensors Test, Memory Test and Repair, On-Line Test & Error correction,  Power / Thermal Issues in Test, System-on-Chip (SOC) Test, Test Standards, Test Economics, Test of Biomedical Devices, Test of High-Speed I/O, Test Quality and Reliability, Test Resource Partitioning, Transients and Soft Errors 2.5D, 3D and SiP Test.

Special Theme: Circuits and Systems for Artificial Intelligence / Machine Learning computing

Paper Submission Guidelines and Proceedings 

1. Paper Submission Guidelines and Proceedings

  • Paper length must be a maximum of five (5) pages of A4 size paper including figures and references. Its content must be original and unpublished.
  • The manuscript must be prepared to conform to IEEE Conference format, e.g. font type, size, column, etc. Accepted paper/s must be registered and presented at the conference.
  • If an author has more than one accepted paper, each paper has also to be registered. Papers (pdf) are to be submitted via Microsoft CMT. 

Paper Submission Link:

https://cmt3.research.microsoft.com/VLSIDCS2022

2. Paper review process:

After submission, the paper enters into the review process. VLSI DCS 2022 research papers are reviewed using a single-blind process managed through Microsoft CMT. A committee of reviewers selected by the Technical Committee will review the documents and rate them according to quality, relevance, correctness, and originality. The review process of research papers (full papers and short papers) for VLSI DCS 2022 will be a two-round process. Papers are reviewed on the basis that they do not contain plagiarized material and have not been submitted to any other conference at the same time (double submission). In the first round, papers are reviewed independently by a minimum of three members of the conference Technical Program Committee (TPC). No outside reviewing is used for In the first round, papers are reviewed independently by a minimum of three members of the conference Technical Program Committee (TPC). No outside reviewing is used for VLSI DCS 2022. Criterions for the peer-reviewed process,

  • Scope and subject relevance: Is the article appropriate for this publication?
  • The novelty of the work: Is this original material distinct from previous publications?
  • Validity: Is the study well designed and executed?
  • Data analysis: Are the data reported, analyzed, and interpreted correctly?
  • The clarity in writings: Are the ideas expressed clearly, concisely, and logically?
  • The clarity in figures/tables/graphs: Are the graphs/figures/tables expressed clearly, concisely with good resolution?
  • Advancement: Is this a significant contribution to the field?
  • Completeness of the references

Registration Details

According to IEEE VLSI DCS 2022 conference registration policy, after obtaining the formal acceptance by e-mail, at least one author of each paper must complete registration formalities including payment of full registration fees at the rate mentioned below. Participants are requested to read all the information displayed below carefully.

In Online Mode:

Member Amount for Indian Author (INR)

Amount for International Authors (USD)

Non-IEEE Members from Academia and Industry

 ₹2500/-

$40

IEEE Members from Academia and Industry

₹2000/-

$30
IEEE Student Members (only UG) (All authors must be students)*

₹1500/-

$20

Non-IEEE Student Members (only UG) (All authors must be students)

₹2000/-

$25
Accompanying Person NIL NIL

Please Note: Each author registration covers up single accepted paper. However, during the second registration by the same author, registration fees will be waived conditionally. 

* as per IEEE Registration Fee Requirements

  • It is mandatory for one of the authors for each paper to register in advance and present the paper for inclusion in the conference proceedings. According to IEEE’s No-show policy, it is up to the discretion of the Conference Committee to allow “no shows” to be published in the IEEE Xplore Digital Library.
  • It is mandatory for one of the authors for each paper to register in advance and present the paper for inclusion in the conference proceedings.
  • To register as a student member, all the authors must be student members.
  • Research scholars will not be considered as any category of student.
  • The registration fee is non-refundable.
  • Registration is required for each accepted paper separately.
  • If an author has more than one accepted paper, he has to register each paper separately.
  • If co-authors want to participate, they have to register as “Accompanying Person”.

 

Details for online payment of the registration fee:

Account Number: 4548002100001238
IFSC Code:  PUNB0454800
Account Name: MEGHNAD SAHA INSTITUTE OF TECHNOLOGY
Bank Name: PUNJAB NATIONAL BANK
Bank Address: SECTOR V, SALT LAKE, KOLKATA 700091
Bank City: KOLKATA
Bank Country: INDIA

After submitting the registration fee via online transfer, authors need to submit the following,

  • Receipt of the conference fees in the google form that is provided. // in pdf or image format//
  • Abstract of the paper // in MS doc format//
  • Camera-ready papers based on the review report // In DOC and PDF//
  • Details of the online transaction in a separate file

Instruction for the registered Authors: 

For registration related issues:  manash@msit.edu.in ( +91 98300 59765 )

Important Dates

Full paper submission date: 21st August, 2021 15 October, 2021  Paper Submission Closed
Notification of acceptance date: 15th October, 2021 15 December, 2021
Registration of the accepted papers: 30th November, 2021 15 January, 2022
Camera-ready Submission: 01 February, 2022

Plenary Speakers

Dr. Saptarshi Das
Associate Professor, Engineering Science and Mechanics, Electrical Engineering and Computer Science, Materials Science and Engineering, Materials Research Institute, Pennsylvania State University, University Park, PA, USA
Click here to view a short Biography of Dr. S. Das

Title of the Talk: Bio-inspired Devices for Sensing, Computing, Storage, and Hardware Security based on Two-dimensional (2D) Materials
Click here to view the Abstract of the Talk by Dr. S. Das

Dr. Writam Banerjee
GlobalFoundries, Germany
Click here to view a short Biography of Dr. W. Banerjee

Title of the Talk: Hybrid Switching Devices
Click here to view the Abstract of the Talk by Dr. W. Banerjee

Prof. (Dr.) Benjamin Iñiguez
Fellow, IEEE EDS, Department of Electronic, Electrical and Automatic Control Engineering, University Rovira i Virgili, Av. Paisos Catalans 26, Tarragona 43007, Spain
Click here to view a short Biography of Dr. Iñiguez

Title of the Talk: Design-oriented Modeling of Thin Film Transistors (TFTs)
Click here to view the Abstract of the Talk by Dr. Iñiguez

Dr. Daniel Tomaszewski
Łukasiewicz Research Network – Institute of Microelectronics and Photonics, Poland, Department of Microsystem Technology, Poland, EIC, IEEE EDS Newsletter
Click here to view a short Biography of Dr. Tomaszewski

Title of the Talk: FET-based detection of THz Radiation: Measurements, Mechanisms, Modeling
Click here to view the Abstract of the Talk by Dr. Tomaszewski

Keynote Speakers

Prof. (Dr.) Subir Kumar Sarkar
SMIEEE & IEEE DL of Electron Device Society, Department of Electronics and Telecommunication Engineering, Jadavpur University, Kolkata-700032, India
Click here to view a short Biography of Dr. Sarkar

Title of the Talk: Transients, Speed and Power Issues in VLSI Circuit Design
Click here to view the Abstract of the Talk by Dr. Sarkar

Prof. (Dr.) Debasish De
Director and Professor, CSE, MAKAUT, Advisory Board Member, IEEE EDS Kolkata Chapter
Click here to view a short Biography of Dr. D. De

Title of the Talk: Carbon Nanotechnology for Healthcare 5.0
Click here to view the Abstract of the Talk by Dr. D. De

Dr. Kanad Basu
Assistant Professor, Department of Electrical and Computer Engineering, University of Texas at Dallas
Click here to view a Short Biography of Dr. K. Basu

Title of the Talk: Anti-virus Hardware: Exploring the New Domain in System Security
Click here to view the Abstract of the Talk by Dr. K. Basu

Prof. (Dr.) Ajit Kumar Panda
National Institute of Science and Technology, Department of Electronics and Communication Engineering, Berhampur, Odisha, India, 761 008
Click here to view a short Biography of Dr. A. Panda

Title of the Talk: Semiconductor Devices for 5G Communication Technology
Click here to view the Abstract of the Talk by Dr. A. Panda

Prof. (Dr.) Mridula Gupta
Head of The Department, Department of Electronic Science, University of Delhi, South Campus, New Delhi
Click here to view a short Biography of Dr. M. Gupta

Title of the Talk: Semiconductor Devices for 5G Communication Technology Small Signal Equivalent Circuit Model Parameter Extraction and Effective Mobility extraction of AlGaN/GaN HEMT using S-parameter
Click here to view the Abstract of the Talk by Dr. M. Gupta

Prof. (Dr.) Rajnish Sharma
Dean (Academic Affairs), Chitkara University Institute of Engineering and Technology, SMIEEE Lead, VLSI Center of Excellence, Secretary, IEEE Delhi Section, Executive committee member, ED Chapter, IEEE Delhi section
Click here to view a short Biography of Dr. R. Sharma

Title of the Talk: “Can past growth of electronic devices be an indicator for what future has in its store?”
Click here to view the Abstract of the Talk by Dr. R. Sharma

Dr. Soumya Pandit
Vice Chair, IEEE EDS SRC, Region 10 and Editor, EDS Newsletter, IEEE R10
Click here to view a short Biography of Dr. S. Pandit

Title of the Talk: Design of a Current Reference Circuit for Ultra-Low Power CMOS Analog Design
Click here to view the Abstract of the Talk by Dr. S. Pandit

 

Prof. (Dr.) Brajesh Kumar Kaushik
Department of Electronics and Communication Engineering, Indian Institute of Technology Roorkee
Click here to view a short Biography of Dr. B. Kaushik

Title of the Talk: Spintronics-Perspectives and Challenges
Click here to view the Abstract of the Talk by Dr. B. Kaushik

Click here to view the Conference Committee of IEEE VLSI DCS 2022

Contact

Dr. Manash Chanda
General Chair, IEEE VLSI DCS 2022,
Chairman, IEEE ED Kolkata Chapter,
Member, IEEE Region 10 Conference Quality and Management Committee,
Chapter Advisor, IEEE ED MSIT SBC,
Advanced VLSI Design Lab,
HOD, Dept. of ECE, MSIT
Meghnad Saha Institute of Technology,
Nazirabad, Uchchepota, Kolkata-700150, West Bengal, India

Mail Id:  ieee.vlsidcs@gmail.com ( for conference-related query)

Contact No.: +91 9830059765